FPGA Exercises in the Advanced Lab

Objective

In this workshop you will work with FPGAs (Field Programmable Gate-Arrays.) Unlike the older, traditional application specific standard products (ASSPs), such as the 4000 or 7400 series chips, FPGAs contain 100k or more logic gates which can be operated reliably in the MHz to GHz range.  These properties make FPGAs ideally suited to be used in an advanced lab course teaching digital logic or to have them directly incorporated into lab projects.

You will interface the Digilent’s FPGA hardware boards and learn how to implement combinational and sequential digital logic using a graphical approach and a hardware descriptive language, such as Verilog.  You will build an interactive 4 bit adder, a coincidence counter driven by a couple of GM tubes.  Pulse width modulation (PWM) technique will be applied to build a digital-to-analog converter to play music and a successive-approximation analog-to-digital converter will be implemented with a state machine.

Time permitting, additional exercises such as using an IP core to create a sinusoidal frequency synthesizer, using the digital clock manager to control the system clock as well as working with other educational hardware options, such as National Instrument’s CompactRIO.  All equipment and software will be provided.

Immersion Handouts

Exercises 

All other relevant workshop documents such as presentation, exercises and installation instructions can be found and uploaded from the Wiki at the University of Minnesota.